clash-lib: CAES Language for Synchronous Hardware - As a Library

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Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

This package provides:

Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:

Prelude library: http://hackage.haskell.org/package/clash-prelude


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Properties

Versions 0.2, 0.2.0.1, 0.2.1, 0.2.2, 0.2.2.1, 0.3, 0.3.0.1, 0.3.0.2, 0.3.0.3, 0.3.0.4, 0.3.1, 0.3.2, 0.4, 0.4.1, 0.5, 0.5.1, 0.5.2, 0.5.3, 0.5.4, 0.5.5, 0.5.6, 0.5.7, 0.5.8, 0.5.9, 0.5.10, 0.5.11, 0.5.12, 0.5.13, 0.6, 0.6.1, 0.6.2, 0.6.3, 0.6.4, 0.6.5, 0.6.6, 0.6.7, 0.6.8, 0.6.9, 0.6.10, 0.6.11, 0.6.12, 0.6.13, 0.6.14, 0.6.15, 0.6.16, 0.6.17, 0.6.18, 0.6.19, 0.6.20, 0.6.21, 0.7, 0.7.1, 0.99, 0.99.1, 0.99.2, 0.99.3, 0.9999, 1.0.0, 1.0.1, 1.2.0, 1.2.1, 1.2.2, 1.2.3, 1.2.4, 1.2.5, 1.4.0, 1.4.1, 1.4.2, 1.4.3, 1.4.4, 1.4.5, 1.4.6
Change log CHANGELOG.md
Dependencies aeson (>=0.6.2.0 && <1.5), ansi-terminal (>=0.8.0.0 && <0.10), ansi-wl-pprint (>=0.6.8.2 && <1.0), attoparsec (>=0.10.4.0 && <0.14), base (>=4.10 && <5), binary (>=0.8.5 && <0.11), bytestring (>=0.10.0.2 && <0.11), clash-prelude (>=0.11.1 && <1.0), concurrent-supply (>=0.1.7 && <0.2), containers (>=0.5.0.0 && <0.7), data-binary-ieee754 (>=0.4.4 && <0.6), deepseq (>=1.3.0.2 && <1.5), directory (>=1.2.0.1 && <1.4), errors (>=1.4.2 && <2.4), exceptions (>=0.8.3 && <0.11.0), filepath (>=1.3.0.1 && <1.5), ghc (>=8.2.0 && <8.9), hashable (>=1.2.1.0 && <1.4), hint (>=0.7 && <0.10), integer-gmp (==1.0.*), interpolate (>=0.2.0 && <1.0), lens (>=3.9.2 && <4.19), mtl (>=2.1.2 && <2.3), parsers (>=0.12.8 && <1.0), prettyprinter (>=1.2.0.1 && <2.0), primitive (>=0.5.0.1 && <1.0), process (>=1.1.0.2 && <1.7), reducers (>=3.12.2 && <4.0), template-haskell (>=2.8.0.0 && <2.16), temporary (>=1.2.1 && <1.4), text (>=1.2.2 && <1.3), text-show (>=3.7 && <3.9), time (>=1.4.0.1 && <1.10), transformers (>=0.5.2.0 && <0.6), trifecta (>=1.7.1.1 && <2.1), unordered-containers (>=0.2.3.3 && <0.3), vector (>=0.11 && <1.0), vector-binary-instances (>=0.2.3.5 && <0.3) [details]
License BSD-2-Clause
Copyright Copyright © 2012-2016, University of Twente, 2016-2017, Myrtle Software Ltd, 2017 , QBayLogic, Google Inc.
Author Christiaan Baaij
Maintainer Christiaan Baaij <christiaan.baaij@gmail.com>
Category Hardware
Home page http://www.clash-lang.org/
Bug tracker http://github.com/clash-lang/clash-compiler/issues
Source repo head: git clone https://github.com/clash-lang/clash-compiler.git
Uploaded by QBayLogic at 2019-09-03T02:09:26Z

Modules

[Index]

Manual Flags

NameDescriptionDefault
debug

Build a debug compiler

Disabled
history

Emit rewrite history to disk

Disabled
Automatic Flags
NameDescriptionDefault

Use -f <flag> to enable a flag, or -f -<flag> to disable that flag. More info

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For package maintainers and hackage trustees


Readme for clash-lib-0.9999

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clash-lib - Clash compiler, as a library

Clash - A functional hardware description language

Clash is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of Clash:

Support

For updates and questions join the mailing list clash-language+subscribe@googlegroups.com or read the forum