arrowVHDL: A library to generate Netlist code from Arrow descriptions.
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Warnings:
- Exposed modules use unallocated top-level names: Beispiel Circuit CRC ALU TEA
This software is intended to help a developer designing electronic circuits by describing them with arrows. The arrow notation represents the according. From the netlist the developer can generate various other formats by "compiling" the arrow into them. With this software three basic compilers are shipped. One generates a simple textual representation that helps debugging the actual circuit. Another generates VHDL representations of the circuit. The third one generates DOT syntax for visualization of circuits.
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Properties
| Versions | 1.0 |
|---|---|
| Change log | None available |
| Dependencies | base (>=4.6 && <4.7), process (>=1.1 && <1.2) [details] |
| License | LicenseRef-PublicDomain |
| Author | Matthias Brettschneider |
| Maintainer | brettschneider@frosch03.de |
| Category | Testing |
| Home page | https://github.com/frosch03/arrowVHDL |
| Uploaded | by frosch03 at 2015-02-21T12:25:37Z |
Modules
- ALU
- Beispiel
- CRC
- Circuit
- TEA
- Test
Downloads
- arrowVHDL-1.0.tar.gz [browse] (Cabal source package)
- Package description (as included in the package)
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