arithmetic-circuits: Arithmetic circuits for zkSNARKs

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Arithmetic circuits for zkSNARKs


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Versions [RSS] 0.2.0
Change log ChangeLog.md
Dependencies aeson (>=1.4 && <1.6), base (>=4.10 && <5), bulletproofs (>=1.1.0 && <1.2), containers (>=0.6.0 && <0.7), elliptic-curve (>=0.3 && <0.4), filepath (>=1.4.2 && <1.5), galois-fft (>=0.1.0 && <0.2), galois-field (>=1.0.0 && <1.0.2), MonadRandom (>=0.5.1 && <0.6), poly (>=0.3.2 && <0.4), process-extras (>=0.7.4 && <0.8), protolude (>=0.2 && <0.3), semirings (>=0.5.0 && <0.7), text (>=1.2.3 && <1.3), vector (>=0.12 && <0.13), wl-pprint-text (>=1.2.0 && <1.3) [details]
License MIT
Author
Maintainer Adjoint Inc (info@adjoint.io)
Revised Revision 2 made by Bodigrim at 2021-08-30T20:11:05Z
Category Cryptography
Home page https://github.com/adjoint-io/arithmetic-circuits#readme
Bug tracker https://github.com/adjoint-io/arithmetic-circuits/issues
Source repo head: git clone https://github.com/adjoint-io/arithmetic-circuits
Uploaded by sdiehl at 2020-01-15T16:04:29Z
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Readme for arithmetic-circuits-0.2.0

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CircleCI

Arithmetic Circuits

An arithmetic circuit is a low-level representation of a program that consists of gates computing arithmetic operations of addition and multiplication, with wires connecting the gates.

This form allows us to express arbitrarily complex programs with a set of private inputs and public inputs whose execution can be publicly verified without revealing the private inputs. This construction relies on recent advances in zero-knowledge proving systems:

This library presents a low-level interface for building zkSNARK proving systems from higher-level compilers. This system depends on the following cryptographic dependenices.

Theory

Towers of Finite Fields

This library can build proof systems polymorphically over a variety of pairing friendly curves. By default we use the BN254 with an efficient implementation of the optimal Ate pairing.

The Barreto-Naehrig (BN) family of curves achieve high security and efficiency with pairings due to an optimum embedding degree and high 2-adicity. We have implemented the optimal Ate pairing over the BN254 curve we define and as:

The tower of finite fields we work with is defined as:

Arithmetic circuits

Arithmetic Circuit

An arithmetic circuit over a finite field is a directed acyclic graph with gates as vertices and wires and edges. It consists of a list of multiplication gates together with a set of linear consistency equations relating the inputs and outputs of the gates.

Let be a finite field and a map that takes arguments as inputs from and outputs l elements in . The function C is an arithmetic circuit if the value of the inputs that pass through wires to gates are only manipulated according to arithmetic operations + or x (allowing constant gates).

Let , , respectively denote the input, witness and output size and be the number of all inputs and outputs of the circuit A tuple , is said to be a valid assignment for an arithmetic circuit C if .

Quadratic Arithmetic Programs (QAP)

QAPs are encodings of arithmetic circuits that allow the prover to construct a proof of knowledge of a valid assignment for a given circuit .

A quadratic arithmetic program (QAP) contains three sets of polynomials in :

, ,

and a target polynomial .

In this setting, an assignment is valid for a circuit if and only if the target polynomial divides the polynomial:

Logical circuits can be written in terms of the addition, multiplication and negation operations.

DSL and Circuit Builder Monad

Any arithmetic circuit can be built using a domain specific language to construct circuits that lives inside Lang.hs.

type ExprM f a = State (ArithCircuit f, Int) a
execCircuitBuilder :: ExprM f a -> ArithCircuit f
-- | Binary arithmetic operations
add, sub, mul :: Expr Wire f f -> Expr Wire f f -> Expr Wire f f
-- | Binary logic operations
-- Have to use underscore or similar to avoid shadowing @and@ and @or@
-- from Prelude/Protolude.
and_, or_, xor_ :: Expr Wire f Bool -> Expr Wire f Bool -> Expr Wire f Bool
-- | Negate expression
not_ :: Expr Wire f Bool -> Expr Wire f Bool
-- | Compare two expressions
eq :: Expr Wire f f -> Expr Wire f f -> Expr Wire f Bool
-- | Convert wire to expression
deref :: Wire -> Expr Wire f f
-- | Return compilation of expression into an intermediate wire
e :: Num f => Expr Wire f f -> ExprM f Wire
-- | Conditional statement on expressions
cond :: Expr Wire f Bool -> Expr Wire f ty -> Expr Wire f ty -> Expr Wire f ty
-- | Return compilation of expression into an output wire
ret :: Num f => Expr Wire f f -> ExprM f Wire

The following program represents the image of the arithmetic circuit above.

program :: ArithCircuit Fr
program = execCircuitBuilder (do
  i0 <- fmap deref input
  i1 <- fmap deref input
  i2 <- fmap deref input
  let r0 = mul i0 i1
      r1 = mul r0 (add i0 i2)
  ret r1)

The output of an arithmetic circuit can be converted to a DOT graph and save it as SVG.

dotOutput :: Text
dotOutput = arithCircuitToDot (execCircuitBuilder program)

Example

We'll keep taking the program constructed with our DSL as example and will use the library pairing that provides a field of points of the BN254 curve and precomputes primitive roots of unity for binary powers that divide .

import Protolude

import qualified Data.Map as Map
import Data.Pairing.BN254 (Fr, getRootOfUnity)

import Circuit.Arithmetic
import Circuit.Expr
import Circuit.Lang
import Fresh (evalFresh, fresh)
import QAP

program :: ArithCircuit Fr
program = execCircuitBuilder (do
  i0 <- fmap deref input
  i1 <- fmap deref input
  i2 <- fmap deref input
  let r0 = mul i0 i1
      r1 = mul r0 (add i0 i2)
  ret r1)

We need to generate the roots of the circuit to construct polynomials and that satisfy the divisibility property and encode the circuit to a QAP to allow the prover to construct a proof of a valid assignment.

We also need to give values to the three input wires to this arithmetic circuit.

roots :: [[Fr]]
roots = evalFresh (generateRoots (fmap (fromIntegral . (+ 1)) fresh) program)

qap :: QAP Fr
qap = arithCircuitToQAPFFT getRootOfUnity roots program

inputs :: Map.Map Int Fr
inputs = Map.fromList [(0, 7), (1, 5), (2, 4)]

A prover can now generate a valid assignment.

assignment :: QapSet Fr
assignment = generateAssignment program inputs

The verifier can check the divisibility property of by for the given circuit.

main :: IO ()
main = do
  if verifyAssignment qap assignment
    then putText "Valid assignment"
    else putText "Invalid assignment"

Disclaimer

This is experimental code meant for research-grade projects only. Please do not use this code in production until it has matured significantly.

License

Copyright (c) 2017-2020 Adjoint Inc.

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
OR OTHER DEALINGS IN THE SOFTWARE.