stm-2.4.3: Software Transactional Memory

Copyright(c) The University of Glasgow 2012
LicenseBSD-style (see the file libraries/base/LICENSE)
Maintainerlibraries@haskell.org
Stabilityexperimental
Portabilitynon-portable (requires STM)
Safe HaskellSafe-Inferred
LanguageHaskell98

Control.Concurrent.STM.TSem

Description

TSem: transactional semaphores.

Synopsis

Documentation

data TSem Source

TSem is a transactional semaphore. It holds a certain number of units, and units may be acquired or released by waitTSem and signalTSem respectively. When the TSem is empty, waitTSem blocks.

Note that TSem has no concept of fairness, and there is no guarantee that threads blocked in waitTSem will be unblocked in the same order; in fact they will all be unblocked at the same time and will fight over the TSem. Hence TSem is not suitable if you expect there to be a high number of threads contending for the resource. However, like other STM abstractions, TSem is composable.

Instances