hapstone-0.2.0.1: Capstone bindings for Haskell

Copyright(c) Inokentiy Babushkin, 2016
LicenseBSD3
MaintainerInokentiy Babushkin <inokentiy.babushkin@googlemail.com>
Stabilityexperimental
Safe HaskellSafe
LanguageHaskell2010

Hapstone.Internal.Arm64

Description

This module contains ARM64 specific datatypes and their respective Storable instances. Most of the types are used internally and can be looked up here. Some of them are currently unused, as the headers only define them as symbolic constants whose type is never used explicitly, which poses a problem for a memory-safe port to the Haskell language, this is about to get fixed in a future version.

Apart from that, because the module is generated using C2HS, some of the documentation is misplaced or rendered incorrectly, so if in doubt, read the source file.

Synopsis

Documentation

data Arm64Sysreg Source #

system registers

Constructors

Arm64SysregInvalid 
Arm64SysregMdrarEl1 
Arm64SysregOslsrEl1 
Arm64SysregDbgauthstatusEl1 
Arm64SysregTrcidr8 
Arm64SysregTrcidr9 
Arm64SysregTrcidr10 
Arm64SysregTrcstatr 
Arm64SysregTrcidr11 
Arm64SysregTrcidr12 
Arm64SysregTrcidr13 
Arm64SysregTrcidr0 
Arm64SysregTrcidr1 
Arm64SysregTrcidr2 
Arm64SysregTrcidr3 
Arm64SysregTrcidr4 
Arm64SysregTrcidr5 
Arm64SysregTrcidr6 
Arm64SysregTrcidr7 
Arm64SysregTrcoslsr 
Arm64SysregTrcpdsr 
Arm64SysregTrcdevid 
Arm64SysregTrcdevtype 
Arm64SysregTrcpidr4 
Arm64SysregTrcpidr5 
Arm64SysregTrcpidr6 
Arm64SysregTrcpidr7 
Arm64SysregTrcpidr0 
Arm64SysregTrcpidr1 
Arm64SysregTrcdevaff0 
Arm64SysregTrcpidr2 
Arm64SysregTrcdevaff1 
Arm64SysregTrcpidr3 
Arm64SysregTrccidr0 
Arm64SysregTrclsr 
Arm64SysregTrccidr1 
Arm64SysregTrcauthstatus 
Arm64SysregTrccidr2 
Arm64SysregTrcdevarch 
Arm64SysregTrccidr3 
Arm64SysregMdccsrEl0 
Arm64SysregDbgdtrrxEl0 
Arm64SysregMidrEl1 
Arm64SysregMpidrEl1 
Arm64SysregRevidrEl1 
Arm64SysregIdPfr0El1 
Arm64SysregIdPfr1El1 
Arm64SysregIdDfr0El1 
Arm64SysregIdAfr0El1 
Arm64SysregIdMmfr0El1 
Arm64SysregIdMmfr1El1 
Arm64SysregIdMmfr2El1 
Arm64SysregIdMmfr3El1 
Arm64SysregIdIsar0El1 
Arm64SysregIdIsar1El1 
Arm64SysregIdIsar2El1 
Arm64SysregIdIsar3El1 
Arm64SysregIdIsar4El1 
Arm64SysregIdIsar5El1 
Arm64SysregMvfr0El1 
Arm64SysregMvfr1El1 
Arm64SysregMvfr2El1 
Arm64SysregIdA64pfr0El1 
Arm64SysregIdA64pfr1El1 
Arm64SysregIdA64dfr0El1 
Arm64SysregIdA64dfr1El1 
Arm64SysregIdA64afr0El1 
Arm64SysregIdA64afr1El1 
Arm64SysregIdA64isar0El1 
Arm64SysregIdA64isar1El1 
Arm64SysregIdA64mmfr0El1 
Arm64SysregIdA64mmfr1El1 
Arm64SysregRvbarEl1 
Arm64SysregIsrEl1 
Arm64SysregIccIar0El1 
Arm64SysregIccHppir0El1 
Arm64SysregIccRprEl1 
Arm64SysregIccIar1El1 
Arm64SysregIccHppir1El1 
Arm64SysregCcsidrEl1 
Arm64SysregClidrEl1 
Arm64SysregAidrEl1 
Arm64SysregCtrEl0 
Arm64SysregDczidEl0 
Arm64SysregPmceid0El0 
Arm64SysregPmceid1El0 
Arm64SysregCntpctEl0 
Arm64SysregCntvctEl0 
Arm64SysregRvbarEl2 
Arm64SysregIchVtrEl2 
Arm64SysregIchEisrEl2 
Arm64SysregIchElsrEl2 
Arm64SysregRvbarEl3 

data Arm64Reg Source #

Constructors

Arm64RegInvalid 
Arm64RegX29 
Arm64RegFp 
Arm64RegX30 
Arm64RegLr 
Arm64RegNzcv 
Arm64RegSp 
Arm64RegWsp 
Arm64RegWzr 
Arm64RegXzr 
Arm64RegB0 
Arm64RegB1 
Arm64RegB2 
Arm64RegB3 
Arm64RegB4 
Arm64RegB5 
Arm64RegB6 
Arm64RegB7 
Arm64RegB8 
Arm64RegB9 
Arm64RegB10 
Arm64RegB11 
Arm64RegB12 
Arm64RegB13 
Arm64RegB14 
Arm64RegB15 
Arm64RegB16 
Arm64RegB17 
Arm64RegB18 
Arm64RegB19 
Arm64RegB20 
Arm64RegB21 
Arm64RegB22 
Arm64RegB23 
Arm64RegB24 
Arm64RegB25 
Arm64RegB26 
Arm64RegB27 
Arm64RegB28 
Arm64RegB29 
Arm64RegB30 
Arm64RegB31 
Arm64RegD0 
Arm64RegD1 
Arm64RegD2 
Arm64RegD3 
Arm64RegD4 
Arm64RegD5 
Arm64RegD6 
Arm64RegD7 
Arm64RegD8 
Arm64RegD9 
Arm64RegD10 
Arm64RegD11 
Arm64RegD12 
Arm64RegD13 
Arm64RegD14 
Arm64RegD15 
Arm64RegD16 
Arm64RegD17 
Arm64RegD18 
Arm64RegD19 
Arm64RegD20 
Arm64RegD21 
Arm64RegD22 
Arm64RegD23 
Arm64RegD24 
Arm64RegD25 
Arm64RegD26 
Arm64RegD27 
Arm64RegD28 
Arm64RegD29 
Arm64RegD30 
Arm64RegD31 
Arm64RegH0 
Arm64RegH1 
Arm64RegH2 
Arm64RegH3 
Arm64RegH4 
Arm64RegH5 
Arm64RegH6 
Arm64RegH7 
Arm64RegH8 
Arm64RegH9 
Arm64RegH10 
Arm64RegH11 
Arm64RegH12 
Arm64RegH13 
Arm64RegH14 
Arm64RegH15 
Arm64RegH16 
Arm64RegH17 
Arm64RegH18 
Arm64RegH19 
Arm64RegH20 
Arm64RegH21 
Arm64RegH22 
Arm64RegH23 
Arm64RegH24 
Arm64RegH25 
Arm64RegH26 
Arm64RegH27 
Arm64RegH28 
Arm64RegH29 
Arm64RegH30 
Arm64RegH31 
Arm64RegQ0 
Arm64RegQ1 
Arm64RegQ2 
Arm64RegQ3 
Arm64RegQ4 
Arm64RegQ5 
Arm64RegQ6 
Arm64RegQ7 
Arm64RegQ8 
Arm64RegQ9 
Arm64RegQ10 
Arm64RegQ11 
Arm64RegQ12 
Arm64RegQ13 
Arm64RegQ14 
Arm64RegQ15 
Arm64RegQ16 
Arm64RegQ17 
Arm64RegQ18 
Arm64RegQ19 
Arm64RegQ20 
Arm64RegQ21 
Arm64RegQ22 
Arm64RegQ23 
Arm64RegQ24 
Arm64RegQ25 
Arm64RegQ26 
Arm64RegQ27 
Arm64RegQ28 
Arm64RegQ29 
Arm64RegQ30 
Arm64RegQ31 
Arm64RegS0 
Arm64RegS1 
Arm64RegS2 
Arm64RegS3 
Arm64RegS4 
Arm64RegS5 
Arm64RegS6 
Arm64RegS7 
Arm64RegS8 
Arm64RegS9 
Arm64RegS10 
Arm64RegS11 
Arm64RegS12 
Arm64RegS13 
Arm64RegS14 
Arm64RegS15 
Arm64RegS16 
Arm64RegS17 
Arm64RegS18 
Arm64RegS19 
Arm64RegS20 
Arm64RegS21 
Arm64RegS22 
Arm64RegS23 
Arm64RegS24 
Arm64RegS25 
Arm64RegS26 
Arm64RegS27 
Arm64RegS28 
Arm64RegS29 
Arm64RegS30 
Arm64RegS31 
Arm64RegW0 
Arm64RegW1 
Arm64RegW2 
Arm64RegW3 
Arm64RegW4 
Arm64RegW5 
Arm64RegW6 
Arm64RegW7 
Arm64RegW8 
Arm64RegW9 
Arm64RegW10 
Arm64RegW11 
Arm64RegW12 
Arm64RegW13 
Arm64RegW14 
Arm64RegW15 
Arm64RegW16 
Arm64RegW17 
Arm64RegW18 
Arm64RegW19 
Arm64RegW20 
Arm64RegW21 
Arm64RegW22 
Arm64RegW23 
Arm64RegW24 
Arm64RegW25 
Arm64RegW26 
Arm64RegW27 
Arm64RegW28 
Arm64RegW29 
Arm64RegW30 
Arm64RegX0 
Arm64RegX1 
Arm64RegX2 
Arm64RegX3 
Arm64RegX4 
Arm64RegX5 
Arm64RegX6 
Arm64RegX7 
Arm64RegX8 
Arm64RegX9 
Arm64RegX10 
Arm64RegX11 
Arm64RegX12 
Arm64RegX13 
Arm64RegX14 
Arm64RegX15 
Arm64RegX16 
Arm64RegIp1 
Arm64RegX17 
Arm64RegIp0 
Arm64RegX18 
Arm64RegX19 
Arm64RegX20 
Arm64RegX21 
Arm64RegX22 
Arm64RegX23 
Arm64RegX24 
Arm64RegX25 
Arm64RegX26 
Arm64RegX27 
Arm64RegX28 
Arm64RegV0 
Arm64RegV1 
Arm64RegV2 
Arm64RegV3 
Arm64RegV4 
Arm64RegV5 
Arm64RegV6 
Arm64RegV7 
Arm64RegV8 
Arm64RegV9 
Arm64RegV10 
Arm64RegV11 
Arm64RegV12 
Arm64RegV13 
Arm64RegV14 
Arm64RegV15 
Arm64RegV16 
Arm64RegV17 
Arm64RegV18 
Arm64RegV19 
Arm64RegV20 
Arm64RegV21 
Arm64RegV22 
Arm64RegV23 
Arm64RegV24 
Arm64RegV25 
Arm64RegV26 
Arm64RegV27 
Arm64RegV28 
Arm64RegV29 
Arm64RegV30 
Arm64RegV31 
Arm64RegEnding 

data CsArm64OpValue Source #

possible operand types (corresponding to the tagged union in the C header)

Constructors

Reg Arm64Reg

register value for Arm64OpReg operands

Imm Int64

immediate value for Arm64OpImm operands

CImm Int64

index value for Arm64OpCimm operands

Fp Double

floating point value for Arm64OpFp operands

Mem Arm64OpMemStruct

base,index,disp value for Arm64OpMem operands

Pstate Arm64Pstate

PState field of MSR instructions

Sys Word32

ICDCAT/TLBI operation (see Arm64IcOp, Arm64DcOp, Arm64AtOp, Arm64TlbiOp), for Arm64OpSys operands

Prefetch Arm64PrefetchOp

PRFM operation for Arm64OpPrefetch operands

Barrier Arm64BarrierOp

memory barrier operation (ISBDMBDSB instructions), for Arm64OpBarrier operands

Undefined

invalid operand value, for Arm64OpInvalid operand

data CsArm64Op Source #

instruction operand

Constructors

CsArm64Op 

Fields

data CsArm64 Source #

instruction datatype

Constructors

CsArm64 

Fields

  • cc :: Arm64ConditionCode

    condition code

  • updateFlags :: Bool

    does this instruction update flags?

  • writeback :: Bool

    does this instruction request writeback?

  • operands :: [CsArm64Op]

    operand list of this instruction, *MUST* have <= 8 elements, else you'll get a runtime error when you (implicitly) try to write it to memory via it's Storable instance

data Arm64Insn Source #

ARM64 instructions

Constructors

Arm64InsInvalid 
Arm64InsAbs 
Arm64InsAdc 
Arm64InsAddhn 
Arm64InsAddhn2 
Arm64InsAddp 
Arm64InsAdd 
Arm64InsAddv 
Arm64InsAdr 
Arm64InsAdrp 
Arm64InsAesd 
Arm64InsAese 
Arm64InsAesimc 
Arm64InsAesmc 
Arm64InsAnd 
Arm64InsAsr 
Arm64InsB 
Arm64InsBfm 
Arm64InsBic 
Arm64InsBif 
Arm64InsBit 
Arm64InsBl 
Arm64InsBlr 
Arm64InsBr 
Arm64InsBrk 
Arm64InsBsl 
Arm64InsCbnz 
Arm64InsCbz 
Arm64InsCcmn 
Arm64InsCcmp 
Arm64InsClrex 
Arm64InsCls 
Arm64InsClz 
Arm64InsCmeq 
Arm64InsCmge 
Arm64InsCmgt 
Arm64InsCmhi 
Arm64InsCmhs 
Arm64InsCmle 
Arm64InsCmlt 
Arm64InsCmtst 
Arm64InsCnt 
Arm64InsMov 
Arm64InsCrc32b 
Arm64InsCrc32cb 
Arm64InsCrc32ch 
Arm64InsCrc32cw 
Arm64InsCrc32cx 
Arm64InsCrc32h 
Arm64InsCrc32w 
Arm64InsCrc32x 
Arm64InsCsel 
Arm64InsCsinc 
Arm64InsCsinv 
Arm64InsCsneg 
Arm64InsDcps1 
Arm64InsDcps2 
Arm64InsDcps3 
Arm64InsDmb 
Arm64InsDrps 
Arm64InsDsb 
Arm64InsDup 
Arm64InsEon 
Arm64InsEor 
Arm64InsEret 
Arm64InsExtr 
Arm64InsExt 
Arm64InsFabd 
Arm64InsFabs 
Arm64InsFacge 
Arm64InsFacgt 
Arm64InsFadd 
Arm64InsFaddp 
Arm64InsFccmp 
Arm64InsFccmpe 
Arm64InsFcmeq 
Arm64InsFcmge 
Arm64InsFcmgt 
Arm64InsFcmle 
Arm64InsFcmlt 
Arm64InsFcmp 
Arm64InsFcmpe 
Arm64InsFcsel 
Arm64InsFcvtas 
Arm64InsFcvtau 
Arm64InsFcvt 
Arm64InsFcvtl 
Arm64InsFcvtl2 
Arm64InsFcvtms 
Arm64InsFcvtmu 
Arm64InsFcvtns 
Arm64InsFcvtnu 
Arm64InsFcvtn 
Arm64InsFcvtn2 
Arm64InsFcvtps 
Arm64InsFcvtpu 
Arm64InsFcvtxn 
Arm64InsFcvtxn2 
Arm64InsFcvtzs 
Arm64InsFcvtzu 
Arm64InsFdiv 
Arm64InsFmadd 
Arm64InsFmax 
Arm64InsFmaxnm 
Arm64InsFmaxnmp 
Arm64InsFmaxnmv 
Arm64InsFmaxp 
Arm64InsFmaxv 
Arm64InsFmin 
Arm64InsFminnm 
Arm64InsFminnmp 
Arm64InsFminnmv 
Arm64InsFminp 
Arm64InsFminv 
Arm64InsFmla 
Arm64InsFmls 
Arm64InsFmov 
Arm64InsFmsub 
Arm64InsFmul 
Arm64InsFmulx 
Arm64InsFneg 
Arm64InsFnmadd 
Arm64InsFnmsub 
Arm64InsFnmul 
Arm64InsFrecpe 
Arm64InsFrecps 
Arm64InsFrecpx 
Arm64InsFrinta 
Arm64InsFrinti 
Arm64InsFrintm 
Arm64InsFrintn 
Arm64InsFrintp 
Arm64InsFrintx 
Arm64InsFrintz 
Arm64InsFrsqrte 
Arm64InsFrsqrts 
Arm64InsFsqrt 
Arm64InsFsub 
Arm64InsHint 
Arm64InsHlt 
Arm64InsHvc 
Arm64InsIns 
Arm64InsIsb 
Arm64InsLd1 
Arm64InsLd1r 
Arm64InsLd2r 
Arm64InsLd2 
Arm64InsLd3r 
Arm64InsLd3 
Arm64InsLd4 
Arm64InsLd4r 
Arm64InsLdarb 
Arm64InsLdarh 
Arm64InsLdar 
Arm64InsLdaxp 
Arm64InsLdaxrb 
Arm64InsLdaxrh 
Arm64InsLdaxr 
Arm64InsLdnp 
Arm64InsLdp 
Arm64InsLdpsw 
Arm64InsLdrb 
Arm64InsLdr 
Arm64InsLdrh 
Arm64InsLdrsb 
Arm64InsLdrsh 
Arm64InsLdrsw 
Arm64InsLdtrb 
Arm64InsLdtrh 
Arm64InsLdtrsb 
Arm64InsLdtrsh 
Arm64InsLdtrsw 
Arm64InsLdtr 
Arm64InsLdurb 
Arm64InsLdur 
Arm64InsLdurh 
Arm64InsLdursb 
Arm64InsLdursh 
Arm64InsLdursw 
Arm64InsLdxp 
Arm64InsLdxrb 
Arm64InsLdxrh 
Arm64InsLdxr 
Arm64InsLsl 
Arm64InsLsr 
Arm64InsMadd 
Arm64InsMla 
Arm64InsMls 
Arm64InsMovi 
Arm64InsMovk 
Arm64InsMovn 
Arm64InsMovz 
Arm64InsMrs 
Arm64InsMsr 
Arm64InsMsub 
Arm64InsMul 
Arm64InsMvni 
Arm64InsNeg 
Arm64InsNot 
Arm64InsOrn 
Arm64InsOrr 
Arm64InsPmull2 
Arm64InsPmull 
Arm64InsPmul 
Arm64InsPrfm 
Arm64InsPrfum 
Arm64InsRaddhn 
Arm64InsRaddhn2 
Arm64InsRbit 
Arm64InsRet 
Arm64InsRev16 
Arm64InsRev32 
Arm64InsRev64 
Arm64InsRev 
Arm64InsRor 
Arm64InsRshrn2 
Arm64InsRshrn 
Arm64InsRsubhn 
Arm64InsRsubhn2 
Arm64InsSabal2 
Arm64InsSabal 
Arm64InsSaba 
Arm64InsSabdl2 
Arm64InsSabdl 
Arm64InsSabd 
Arm64InsSadalp 
Arm64InsSaddlp 
Arm64InsSaddlv 
Arm64InsSaddl2 
Arm64InsSaddl 
Arm64InsSaddw2 
Arm64InsSaddw 
Arm64InsSbc 
Arm64InsSbfm 
Arm64InsScvtf 
Arm64InsSdiv 
Arm64InsSha1c 
Arm64InsSha1h 
Arm64InsSha1m 
Arm64InsSha1p 
Arm64InsSha1su0 
Arm64InsSha1su1 
Arm64InsSha256h2 
Arm64InsSha256h 
Arm64InsSha256su0 
Arm64InsSha256su1 
Arm64InsShadd 
Arm64InsShll2 
Arm64InsShll 
Arm64InsShl 
Arm64InsShrn2 
Arm64InsShrn 
Arm64InsShsub 
Arm64InsSli 
Arm64InsSmaddl 
Arm64InsSmaxp 
Arm64InsSmaxv 
Arm64InsSmax 
Arm64InsSmc 
Arm64InsSminp 
Arm64InsSminv 
Arm64InsSmin 
Arm64InsSmlal2 
Arm64InsSmlal 
Arm64InsSmlsl2 
Arm64InsSmlsl 
Arm64InsSmov 
Arm64InsSmsubl 
Arm64InsSmulh 
Arm64InsSmull2 
Arm64InsSmull 
Arm64InsSqabs 
Arm64InsSqadd 
Arm64InsSqdmlal 
Arm64InsSqdmlal2 
Arm64InsSqdmlsl 
Arm64InsSqdmlsl2 
Arm64InsSqdmulh 
Arm64InsSqdmull 
Arm64InsSqdmull2 
Arm64InsSqneg 
Arm64InsSqrdmulh 
Arm64InsSqrshl 
Arm64InsSqrshrn 
Arm64InsSqrshrn2 
Arm64InsSqrshrun 
Arm64InsSqrshrun2 
Arm64InsSqshlu 
Arm64InsSqshl 
Arm64InsSqshrn 
Arm64InsSqshrn2 
Arm64InsSqshrun 
Arm64InsSqshrun2 
Arm64InsSqsub 
Arm64InsSqxtn2 
Arm64InsSqxtn 
Arm64InsSqxtun2 
Arm64InsSqxtun 
Arm64InsSrhadd 
Arm64InsSri 
Arm64InsSrshl 
Arm64InsSrshr 
Arm64InsSrsra 
Arm64InsSshll2 
Arm64InsSshll 
Arm64InsSshl 
Arm64InsSshr 
Arm64InsSsra 
Arm64InsSsubl2 
Arm64InsSsubl 
Arm64InsSsubw2 
Arm64InsSsubw 
Arm64InsSt1 
Arm64InsSt2 
Arm64InsSt3 
Arm64InsSt4 
Arm64InsStlrb 
Arm64InsStlrh 
Arm64InsStlr 
Arm64InsStlxp 
Arm64InsStlxrb 
Arm64InsStlxrh 
Arm64InsStlxr 
Arm64InsStnp 
Arm64InsStp 
Arm64InsStrb 
Arm64InsStr 
Arm64InsStrh 
Arm64InsSttrb 
Arm64InsSttrh 
Arm64InsSttr 
Arm64InsSturb 
Arm64InsStur 
Arm64InsSturh 
Arm64InsStxp 
Arm64InsStxrb 
Arm64InsStxrh 
Arm64InsStxr 
Arm64InsSubhn 
Arm64InsSubhn2 
Arm64InsSub 
Arm64InsSuqadd 
Arm64InsSvc 
Arm64InsSysl 
Arm64InsSys 
Arm64InsTbl 
Arm64InsTbnz 
Arm64InsTbx 
Arm64InsTbz 
Arm64InsTrn1 
Arm64InsTrn2 
Arm64InsUabal2 
Arm64InsUabal 
Arm64InsUaba 
Arm64InsUabdl2 
Arm64InsUabdl 
Arm64InsUabd 
Arm64InsUadalp 
Arm64InsUaddlp 
Arm64InsUaddlv 
Arm64InsUaddl2 
Arm64InsUaddl 
Arm64InsUaddw2 
Arm64InsUaddw 
Arm64InsUbfm 
Arm64InsUcvtf 
Arm64InsUdiv 
Arm64InsUhadd 
Arm64InsUhsub 
Arm64InsUmaddl 
Arm64InsUmaxp 
Arm64InsUmaxv 
Arm64InsUmax 
Arm64InsUminp 
Arm64InsUminv 
Arm64InsUmin 
Arm64InsUmlal2 
Arm64InsUmlal 
Arm64InsUmlsl2 
Arm64InsUmlsl 
Arm64InsUmov 
Arm64InsUmsubl 
Arm64InsUmulh 
Arm64InsUmull2 
Arm64InsUmull 
Arm64InsUqadd 
Arm64InsUqrshl 
Arm64InsUqrshrn 
Arm64InsUqrshrn2 
Arm64InsUqshl 
Arm64InsUqshrn 
Arm64InsUqshrn2 
Arm64InsUqsub 
Arm64InsUqxtn2 
Arm64InsUqxtn 
Arm64InsUrecpe 
Arm64InsUrhadd 
Arm64InsUrshl 
Arm64InsUrshr 
Arm64InsUrsqrte 
Arm64InsUrsra 
Arm64InsUshll2 
Arm64InsUshll 
Arm64InsUshl 
Arm64InsUshr 
Arm64InsUsqadd 
Arm64InsUsra 
Arm64InsUsubl2 
Arm64InsUsubl 
Arm64InsUsubw2 
Arm64InsUsubw 
Arm64InsUzp1 
Arm64InsUzp2 
Arm64InsXtn2 
Arm64InsXtn 
Arm64InsZip1 
Arm64InsZip2 
Arm64InsMneg 
Arm64InsUmnegl 
Arm64InsSmnegl 
Arm64InsNop 
Arm64InsYield 
Arm64InsWfe 
Arm64InsWfi 
Arm64InsSev 
Arm64InsSevl 
Arm64InsNgc 
Arm64InsSbfiz 
Arm64InsUbfiz 
Arm64InsSbfx 
Arm64InsUbfx 
Arm64InsBfi 
Arm64InsBfxil 
Arm64InsCmn 
Arm64InsMvn 
Arm64InsTst 
Arm64InsCset 
Arm64InsCinc 
Arm64InsCsetm 
Arm64InsCinv 
Arm64InsCneg 
Arm64InsSxtb 
Arm64InsSxth 
Arm64InsSxtw 
Arm64InsCmp 
Arm64InsUxtb 
Arm64InsUxth 
Arm64InsUxtw 
Arm64InsIc 
Arm64InsDc 
Arm64InsAt 
Arm64InsTlbi 
Arm64InsEnding