Documentation

For the digital-analog conversion we have two different possibilities which is determined by this data type DACMode.

The type of a sub-signal of a continuous signal. It consisits of the function and the interval on which the function is defined. The continuous time signal is then defined as a sequence of SubsigCT elements: Signal SubsigCT

The function liftCT creates a CT-compliant function (using the Rationals as domain) from a normal mathematical function that uses a fractional (Double) as domain

The function ctSignal creates a CT signal from a list of subsignals that are given by a function, an a time range.

*ForSyDe.Shallow.MoC.CT> ctsig1 = ctSignal [(liftCT sin, (0, 3.14)), (\t -> 1, (3.14, 6.28))]
*ForSyDe.Shallow.MoC.CT> :t ctsig1
ctsig1 :: Floating a => Signal (SubsigCT a)-- ctsig1 = ctSignal [(liftCT sin, (0, 3.14)), (\t -> 1, (3.14, 6.28))]

This constant gives the default time step for sampling and plotting. Its value is 10ns.

scaleCT amplifies an input by a constant factor:

addCT adds two input signals together.

multCT multiplies two input signals together.

absCT takes the absolute value of a signal.

sineWave generates a sinus signal with the given frequency defined over a given period. The function is defined as f(x)=sin(2*pi*freq*x).

d2aConverter converts an untimes or synchronous signal into a continuous time signal. The process d2aConverter converts a signal of the digital domain into a continuous time signal. There are two modes, DAlinear, which makes a smooth transition between adjacent digital values and DAhold, where the analog value directly follows the digital value. This means that in DAhold-mode a staircase function remains a staircase function, while in DAlinear the staircase function would resemble at least partially a saw tooth-curve.

The resolution of the converter is given by the parameter timeStep.

Note, that the process d2aConverter is an ideal component, i.e. there are no losses due to a limited resolution due to a fixed number of bits.

The process a2dConverter converts a continuous time signal to an untimed or synchronous signal. The first parameter gives the sampling period of the converter.

Note, that the process a2dConverter is an ideal component, i.e. there are no losses due to a limited resolution due to a fixed number of bits.

applyF1 applies a function on a sub-signal, which means the function of the subsignal is transformed to another function:

applyF2 works just like applyF1 but operates on two incoming signals.

applyG1 is used to apply a next-state function. A very interesting question is, what should be an argument to the next-state function: the incoming function, defining the value of the input signal? or the incoming function and the incoming interval? or the value of the incoming signal at a particular point, e.g. at the left most point of the interval? To give the next-state function the interval itself as argument, would mean that the process becomes time variant process, i.e. its behaviour is dependent on the absolute time values. This is not a good thing to have! Another possibility may be to give a sub-signal that is relative to the current evaluation, i.e. the left most point is always 0. Would that make sense?

cutEq partitions the two signals such that the partitioning are identical in both result signals, but only up to the duration of the shorter of the two signals:

showParts allows to see how a signal is partitioned into sub-signals. It returns the sequence of intervals.

plot plots one signal in a graph with the default sampling period of 1/200 of the duration of the signal.

plotCT plots a list of signals in the same graph. The sampling period has to be given as argument. In the graph default label names are used to identify the signals.

plotCT' is the work horse for plotting and the functions plot and plotCT use it with specialising arguments.

plotCT' plots all the signals in the list in one graph. If a label is given for a signal, this label appears in the graph. If the label string is "", a default label like "sig-1" is used.

In addition to displaying the graph on the screen, the following files are created in directory ./fig:

ct-moc-graph.eps

an eps file of the complete graph

ct-moc-graph.pdf

A pdf file of the complete graph

ct-moc-graph-latex.eps

included by ct-moc-graph-latex.tex

ct-moc-graph-latex.tex

This is the tex file that should be included by your latex document. It in turn includes the file ct-moc-graph-latex.eps. These two files have to be used together; the .eps file contains only the graphics, while the .tex file contains the labels and text.

vcdGen dumps the values of a list of signal in VCD (Value Change Dump) format (IEEE Std 1364-2001), which is part of the Verilog standard (http://en.wikipedia.org/wiki/Value_change_dump). There are public domain tools to view VCD files. For instance, GTKWave (http://home.nc.rr.com/gtkwave/) is a popular viewer available for Windows and Linux.

The values are written to the file .figct-moc.vcd. If the file exists, it is overwritten. If the directory does not exist, it is created.