type representing fpga registry

Redpitaya Channel A or B.

FpgaSetGet is typeclass for acesssing Fpga

get ID , 0 prototype , 1 release

get DNA

set expansion connector direction P registry

1 out , 0 in

get expansion connector direction P registry

1 out , 0 in

set expansion connector direction N registry

1 out , 0 in

get expansion connector direction N registry

1 out , 0 in

expansion connector P output registry value

expansion connector N output registry value

expansion connector P input registry value

expansion connector N input registry value

type of gpio can be either P on N

represent gpio direction, that can be either Input or Output

type representing pin number

Sets direction of pin

represent gpio value that can be either Hi or Low

Sets outout value of pin read using getExpOutN , fmap over setBitValue and bind in setExpOutX

Sets output value of single pin

write in led registry

read in led registry

reset write state machine for oscilloscope

start writing data into memory (ARM trigger).

oscilloscope trigger selection

set oscilloscope trigger

when trigger delay is value becomes True

Ch x threshold, makes trigger when ADC value cross this value

gets ch x threshold

Number of decimated data after trigger written into memory

gets delay after trigger value

sets oscilloscope decimation registry, allows only 1,8, 64,1024,8192,65536. If other value is written data will NOT be correct.

oscilloscope decimation registry value

oscilloscope decimation

set oscilloscope decimation

write pointer - current

write pointer - trigger

ch x hysteresis

set ch x hysteresis

Enable signal average at decimation True enables, False disables

set ch A equalization filter, takes array with coefficients [AA,BB,KK,PP]

get ch x equalization filter, return array with coefficients [AA,BB,KK,PP]

starting writing address ch x - CH x AXI lower address

read - starting writing address ch x - CH x AXI lower address

starting writing address ch x - CH x AXI lower address

read - starting writing address ch x - CH x AXI lower address

set umber of decimated data after trigger written into memory

read - Number of decimated data after trigger written into memory

Enable AXI master

Write pointer for ch x at time when trigger arrived

current write pointer for ch x

reads oscilloscope buffer for channel x from Fpga passing offset and length. buffer should fit within 16k sampling range. Returns less than requested data if trying to read over the bounds.

get ASGoption registry

set ASG option registry

ch B external gated repetitions, registry can be either 0x0 or 0x1

get ch B external gated repetitions, registry can be either 0x0 or 0x1

TODO others

todo other registries

Ch x amplitude scale (14 bist) - out = (data*scale)/0x2000 + offset

Ch x amplitude offset (14 bits) - out = (data*scale)/0x2000 + offset

Ch x counter wrap - Value where counter wraps around. Depends on SM wrap setting. If it is 1 new value is get by wrap, if value is 0 counter goes to offset value. 16 bits for decimals.

Ch x Counter start offset. Start offset when trigger arrives. 16 bits for decimals.

Ch x counter step. 16 bits for decimals.

get ch x buffer current read pointer

set ch x buffer current read pointer

get ch x number of read cycles in one burst

set ch x number of read cycles in one burst

get ch x number of read cycles in one burst

set ch x number of read cycles in one burst

get ch x delay between burst repetitions, granularity=1us

set ch x delay between burst repetitions, granularity=1us

type representing fpga memory page

type representing fpga memory offset from page

direct read from fpga registry fpgaRead :: Page -> Offset -> Fpga FpgaMmapM Registry

direct write in fpga registry

apply transformation on fpga registry value

write array in fpga memory

read array from fpga memory, passing page, offset and length

size of Fpga page