| Safe Haskell | None |
|---|---|
| Language | Haskell2010 |
System.RedPitaya.Fpga
Description
Red Pitaya native library for accessing Fpga
- data Fpga a
- type Registry = Word32
- data Channel
- withOpenFpga :: Fpga a -> IO a
- fpgaId :: Fpga Registry
- dna :: Fpga Integer
- setExpDirP :: Registry -> Fpga ()
- getExpDirP :: Fpga Registry
- setExpDirN :: Registry -> Fpga ()
- getExpDirN :: Fpga Registry
- setExpOutP :: Registry -> Fpga ()
- setExpOutN :: Registry -> Fpga ()
- getExpInP :: Fpga Registry
- getExpInN :: Fpga Registry
- data GpioType
- data GpioDirection
- type PinNum = Int
- setExpDir :: GpioType -> GpioDirection -> PinNum -> Fpga ()
- data GpioValue
- setExpOut :: GpioType -> GpioValue -> PinNum -> Fpga ()
- getExpOut :: GpioType -> PinNum -> Fpga GpioValue
- setLed :: Registry -> Fpga ()
- getLed :: Fpga Registry
- resetWriteSM :: Fpga ()
- triggerNow :: Fpga ()
- data TriggerSource
- setOscTrigger :: TriggerSource -> Fpga ()
- triggerDelayEnded :: Fpga Bool
- setTreshold :: Channel -> Registry -> Fpga ()
- getTreshold :: Channel -> Fpga Registry
- setDelayAfterTrigger :: Registry -> Fpga ()
- getDelayAfterTrigger :: Fpga Registry
- setOscDecimationRaw :: Registry -> Fpga ()
- getOscDecimationRaw :: Fpga Registry
- data OscDecimation
- setOscDecimation :: OscDecimation -> Fpga ()
- getOscWpCurrent :: Fpga Registry
- getOscWpTrigger :: Fpga Registry
- getOscHysteresis :: Channel -> Fpga Registry
- setOscHysteresis :: Channel -> Registry -> Fpga ()
- enableOscDecimationAvarage :: Bool -> Fpga ()
- setEqualFilter :: Channel -> [Registry] -> Fpga ()
- getEqualFilter :: Channel -> Fpga [Registry]
- setAxiLowerAddress :: Channel -> Registry -> Fpga ()
- getAxiLowerAddress :: Channel -> Fpga Registry
- setAxiUpperAddress :: Channel -> Registry -> Fpga ()
- getAxiUpperAddress :: Channel -> Fpga Registry
- setAxiDelayAfterTrigger :: Channel -> Registry -> Fpga ()
- getAxiDelayAfterTrigger :: Channel -> Fpga Registry
- enableAxiMaster :: Channel -> Bool -> Fpga ()
- getAxiWritePtrTrigger :: Channel -> Fpga Registry
- getAxiWritePtrCurrent :: Channel -> Fpga Registry
- getOscBuffer :: Channel -> Offset -> Int -> Fpga [Registry]
- getAsgOption :: Fpga Registry
- setAsgOption :: Registry -> Fpga ()
- setAsgOptionBExtGatRep :: Registry -> Fpga ()
- getAsgOptionBExtGatRep :: Fpga Registry
- setAsgAmplitudeScale :: Channel -> Registry -> Fpga ()
- setAsgAmplitudeOffset :: Channel -> Registry -> Fpga ()
- setAsgCounterWrap :: Channel -> Registry -> Fpga ()
- setAsgCounterStartOffset :: Channel -> Registry -> Fpga ()
- setAsgCounterStep :: Channel -> Registry -> Fpga ()
- getAsgCounterReadPtr :: Channel -> Fpga Registry
- setAsgCounterReadPtr :: Channel -> Registry -> Fpga ()
- getAsgNumReadCycles :: Channel -> Fpga Registry
- setAsgNumReadCycles :: Channel -> Registry -> Fpga ()
- getAsgNumRepetitions :: Channel -> Fpga Registry
- setAsgNumRepetitions :: Channel -> Registry -> Fpga ()
- getAsgBurstDelay :: Channel -> Fpga Registry
- setAsgBurstDelay :: Channel -> Registry -> Fpga ()
- type Page = Int
- type Offset = Int
- fpgaRead :: Page -> Offset -> Fpga Registry
- fpgaWrite :: Page -> Offset -> Registry -> Fpga ()
- fpgaFmap :: Page -> Offset -> (Registry -> Registry) -> Fpga ()
- pokeFpgaArray :: Page -> Offset -> [Registry] -> Fpga ()
- peekFpgaArray :: Page -> Offset -> Int -> Fpga [Registry]
Documentation
Environment where one can read and write Fpga registries
withOpenFpga :: Fpga a -> IO a Source
This function handles initialising Fpga memory mapping and
evaluates Fpga action.
Housekeeping
various housekeeping and Gpio functions
setExpDirP :: Registry -> Fpga () Source
set expansion connector direction P registry
1 out , 0 in
getExpDirP :: Fpga Registry Source
get expansion connector direction P registry
1 out , 0 in
setExpDirN :: Registry -> Fpga () Source
set expansion connector direction N registry
1 out , 0 in
getExpDirN :: Fpga Registry Source
get expansion connector direction N registry
1 out , 0 in
setExpOutP :: Registry -> Fpga () Source
expansion connector P output registry value
setExpOutN :: Registry -> Fpga () Source
expansion connector N output registry value
type of gpio can be either P on N
represent gpio value that can be either Hi or Low
Oscilloscope
functions for accessing oscilloscope features
resetWriteSM :: Fpga () Source
reset write state machine for oscilloscope
triggerNow :: Fpga () Source
start writing data into memory (ARM trigger).
data TriggerSource Source
oscilloscope trigger selection
Constructors
| Immediately | trig immediately |
| ChAPositiveEdge | ch A threshold positive edge |
| ChANegativeEdge | ch A threshold negative edge |
| ChBPositiveEdge | ch B threshold positive edge |
| ChBNegativeEdge | ch B threshold negative edge |
| ExtPositiveEdge | external trigger positive edge - DIO0_P pin |
| ExtNegaitveEdge | external trigger negative edge |
| AWGPositiveEdge | arbitrary wave generator application positive edge |
| AWGNegativeEdge | arbitrary wave generator application negative edge |
Instances
setOscTrigger :: TriggerSource -> Fpga () Source
set oscilloscope trigger
triggerDelayEnded :: Fpga Bool Source
when trigger delay is value becomes True
setTreshold :: Channel -> Registry -> Fpga () Source
Ch x threshold, makes trigger when ADC value cross this value
getTreshold :: Channel -> Fpga Registry Source
gets ch x threshold
setDelayAfterTrigger :: Registry -> Fpga () Source
Number of decimated data after trigger written into memory
getDelayAfterTrigger :: Fpga Registry Source
gets delay after trigger value
setOscDecimationRaw :: Registry -> Fpga () Source
sets oscilloscope decimation registry, allows only 1,8, 64,1024,8192,65536. If other value is written data will NOT be correct.
getOscDecimationRaw :: Fpga Registry Source
oscilloscope decimation registry value
data OscDecimation Source
oscilloscope decimation
Constructors
| OscDec1 | |
| OscDec8 | |
| OscDec64 | |
| OscDec1024 | |
| OscDec8192 | |
| OscDec65536 |
Instances
setOscDecimation :: OscDecimation -> Fpga () Source
set oscilloscope decimation
getOscWpCurrent :: Fpga Registry Source
write pointer - current
getOscWpTrigger :: Fpga Registry Source
write pointer - trigger
getOscHysteresis :: Channel -> Fpga Registry Source
ch x hysteresis
setOscHysteresis :: Channel -> Registry -> Fpga () Source
set ch x hysteresis
enableOscDecimationAvarage :: Bool -> Fpga () Source
Enable signal average at decimation True enables, False disables
setEqualFilter :: Channel -> [Registry] -> Fpga () Source
set ch A equalization filter, takes array with coefficients [AA,BB,KK,PP]
getEqualFilter :: Channel -> Fpga [Registry] Source
get ch x equalization filter, return array with coefficients [AA,BB,KK,PP]
setAxiLowerAddress :: Channel -> Registry -> Fpga () Source
starting writing address ch x - CH x AXI lower address
getAxiLowerAddress :: Channel -> Fpga Registry Source
read - starting writing address ch x - CH x AXI lower address
setAxiUpperAddress :: Channel -> Registry -> Fpga () Source
starting writing address ch x - CH x AXI lower address
getAxiUpperAddress :: Channel -> Fpga Registry Source
read - starting writing address ch x - CH x AXI lower address
setAxiDelayAfterTrigger :: Channel -> Registry -> Fpga () Source
set umber of decimated data after trigger written into memory
getAxiDelayAfterTrigger :: Channel -> Fpga Registry Source
read - Number of decimated data after trigger written into memory
enableAxiMaster :: Channel -> Bool -> Fpga () Source
Enable AXI master
getAxiWritePtrTrigger :: Channel -> Fpga Registry Source
Write pointer for ch x at time when trigger arrived
getAxiWritePtrCurrent :: Channel -> Fpga Registry Source
current write pointer for ch x
getOscBuffer :: Channel -> Offset -> Int -> Fpga [Registry] Source
reads oscilloscope buffer for channel x from Fpga passing offset and length. buffer should fit within 16k sampling range. Returns less than requested data if trying to read over the bounds.
Arbitrary Signal Generator (ASG)
getAsgOption :: Fpga Registry Source
get ASGoption registry
setAsgOption :: Registry -> Fpga () Source
set ASG option registry
setAsgOptionBExtGatRep :: Registry -> Fpga () Source
ch B external gated repetitions, registry can be either 0x0 or 0x1
getAsgOptionBExtGatRep :: Fpga Registry Source
get ch B external gated repetitions, registry can be either 0x0 or 0x1
setAsgAmplitudeScale :: Channel -> Registry -> Fpga () Source
TODO others
todo other registries
Ch x amplitude scale (14 bist) - out = (data*scale)/0x2000 + offset
setAsgAmplitudeOffset :: Channel -> Registry -> Fpga () Source
Ch x amplitude offset (14 bits) - out = (data*scale)/0x2000 + offset
setAsgCounterWrap :: Channel -> Registry -> Fpga () Source
Ch x counter wrap - Value where counter wraps around. Depends on SM wrap setting. If it is 1 new value is get by wrap, if value is 0 counter goes to offset value. 16 bits for decimals.
setAsgCounterStartOffset :: Channel -> Registry -> Fpga () Source
Ch x Counter start offset. Start offset when trigger arrives. 16 bits for decimals.
setAsgCounterStep :: Channel -> Registry -> Fpga () Source
Ch x counter step. 16 bits for decimals.
getAsgCounterReadPtr :: Channel -> Fpga Registry Source
get ch x buffer current read pointer
setAsgCounterReadPtr :: Channel -> Registry -> Fpga () Source
set ch x buffer current read pointer
getAsgNumReadCycles :: Channel -> Fpga Registry Source
get ch x number of read cycles in one burst
setAsgNumReadCycles :: Channel -> Registry -> Fpga () Source
set ch x number of read cycles in one burst
getAsgNumRepetitions :: Channel -> Fpga Registry Source
get ch x number of read cycles in one burst
setAsgNumRepetitions :: Channel -> Registry -> Fpga () Source
set ch x number of read cycles in one burst
getAsgBurstDelay :: Channel -> Fpga Registry Source
get ch x delay between burst repetitions, granularity=1us
setAsgBurstDelay :: Channel -> Registry -> Fpga () Source
set ch x delay between burst repetitions, granularity=1us
Plumbing
low level functions for direct Fpga access, used to extend interface