Copyright | (C) 2019 Myrtle Software Ltd |
---|---|
License | BSD2 (see the file LICENSE) |
Maintainer | QBayLogic B.V. <devops@qbaylogic.com> |
Safe Haskell | None |
Language | Haskell2010 |
Verification
Synopsis
- pprPslProperty :: HDL -> Text -> Text -> ActiveEdge -> Property' Text -> Declaration
- pprSvaProperty :: Text -> Text -> ActiveEdge -> Property' Text -> Declaration
- pprYosysSvaProperty :: Text -> Expr -> ActiveEdge -> Property' Text -> Declaration
- pprProperty :: Property dom -> Declaration
Documentation
:: HDL | HDL to generate PSL expression for |
-> Text | Property name |
-> Text | Clock name |
-> ActiveEdge | Edge property should be sensitive to |
-> Property' Text | Assertion / Cover statement |
-> Declaration |
:: Text | Property name |
-> Text | Clock name |
-> ActiveEdge | Edge property should be sensitive to |
-> Property' Text | Assertion / Cover statement |
-> Declaration |
:: Text | Property name |
-> Expr | Clock expression |
-> ActiveEdge | Edge property should be sensitive to |
-> Property' Text | Assertion / Cover statement |
-> Declaration |
Generate something like:
always
(posedge clk_i) isOn: cover (result);@
Debugging functions
pprProperty :: Property dom -> Declaration Source #
Pretty print Property. Doesn't print valid HDL, but can be used for debugging purposes.