clash-prelude-1.6.6: Clash: a functional hardware description language - Prelude library
Copyright(C) 2015-2016 University of Twente
2017 Google Inc.
2019 Myrtle Software Ltd
2021-2022 QBayLogic B.V.
LicenseBSD2 (see the file LICENSE)
MaintainerQBayLogic B.V. <devops@qbaylogic.com>
Safe HaskellTrustworthy
LanguageHaskell2010
Extensions
  • ScopedTypeVariables
  • BangPatterns
  • ViewPatterns
  • DataKinds
  • InstanceSigs
  • StandaloneDeriving
  • DeriveDataTypeable
  • DeriveFunctor
  • DeriveTraversable
  • DeriveFoldable
  • DeriveGeneric
  • DefaultSignatures
  • DeriveLift
  • DerivingStrategies
  • FlexibleContexts
  • MagicHash
  • KindSignatures
  • TupleSections
  • RankNTypes
  • TypeOperators
  • ExplicitNamespaces
  • ExplicitForAll
  • BinaryLiterals
  • TypeApplications

Clash.Prelude.ROM

Description

ROMs

Synopsis

Asynchronous ROM

asyncRom Source #

Arguments

:: (KnownNat n, Enum addr) 
=> Vec n a

ROM content, also determines the size, n, of the ROM

NB: MUST be a constant

-> addr

Read address r

-> a

The value of the ROM at address r

An asynchronous/combinational ROM with space for n elements

See also:

asyncRomPow2 Source #

Arguments

:: KnownNat n 
=> Vec (2 ^ n) a

ROM content

NB: MUST be a constant

-> Unsigned n

Read address r

-> a

The value of the ROM at address r

An asynchronous/combinational ROM with space for 2^n elements

See also:

Synchronous ROM synchronized to an arbitrary clock

rom Source #

Arguments

:: forall dom n m a. (NFDataX a, KnownNat n, KnownNat m, HiddenClock dom, HiddenEnable dom) 
=> Vec n a

ROM content, also determines the size, n, of the ROM

NB: MUST be a constant

-> Signal dom (Unsigned m)

Read address r

-> Signal dom a

The value of the ROM at address r from the previous clock cycle

A ROM with a synchronous read port, with space for n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined, reading it will throw an XException

See also:

romPow2 Source #

Arguments

:: forall dom n a. (KnownNat n, NFDataX a, HiddenClock dom, HiddenEnable dom) 
=> Vec (2 ^ n) a

ROM content

NB: MUST be a constant

-> Signal dom (Unsigned n)

Read address r

-> Signal dom a

The value of the ROM at address r from the previous clock cycle

A ROM with a synchronous read port, with space for 2^n elements

  • NB: Read value is delayed by 1 cycle
  • NB: Initial output value is undefined, reading it will throw an XException

See also:

Internal

asyncRom# Source #

Arguments

:: forall n a. KnownNat n 
=> Vec n a

ROM content, also determines the size, n, of the ROM

NB: MUST be a constant

-> Int

Read address r

-> a

The value of the ROM at address r

asyncRom primitive